Publications of the Astronomical Society of the Pacific, Vol. 132, No. 1014 (2020 August), pp. 1-7 (7 pages) In this study, a 4 bit, 16 giga samples per second analog-to-digital converter (ADC) ...
The A8B40G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a time-interleaved successive approximation register (SAR) ADC, with 8-bit ...
For instance, one study presented a 10-bit, 200-kS/s single-ended ... switching scheme that achieves a 95.4% energy saving in the digital-to-analog converter (DAC) switching process, significantly ...
Low-Power Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs ... comparator to achieve significant power savings [4]. This design showcases the potential for integrating ...